Electronic, physical and theoretical review of a pn junction field effect transistor
DOI:
https://doi.org/10.38017/2390058X.110Keywords:
Pn union, desertion region, saturation current, saturation voltage, junction field effect transistor.Abstract
This revision of the Electronics and Physics field effect transistor pn junction aims to explain and understand the mechanics of its operation. This type of transistor uses the following mechanism varying the width of the depletion layer in a pn junction modulates a bias voltage applied to the junction, the device uses this mechanism, to control the current passing through a region bounded by one or more pn junctions. As low stream flows to the pn junction reverse biased, then it consumes a small amount of power to the control electrode, therefore the controlled current delivers more power. This is the explanation synthesized of the device called field effect transistor, pn junction (JFET junction field effect transistor) and is used as a power amplifier.Author Biographies
Edwin Javier Sánchez Uriza, Fundación Universitaria Juan de Castellanos
Daniel Augusto Castellanos Coronado, Fundación Universitaria Juan de Castellanos
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